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INTEGRATED CIRCUITS
DATA SHEET
UAA3522HL Low power dual-band GSM transceiver with an image rejecting front-end
Objective specification File under Integrated Circuits, IC17 2000 Feb 18
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
FEATURES * Dual-band application for Global System for Mobile communication (GSM) and Digital Cellular communication Systems (DCS) * Low noise and wide dynamic range single Intermediate Frequency (IF) transceiver * More than 30 dB on-chip image rejection in the receiver * More than 60 dB gain control range * I/Q demodulator with high performance integrated baseband channel filter * High precision I/Q modulator * Transmit modulation loop architecture including offset mixer and phase detector * Dual Phase-Locked Loop (PLL) with on-chip IF Voltage Controlled Oscillator (VCO) * Fully differential design minimizing cross-talk and spurii * 3-wire serial bus interface * Functional down to 2.7 V and up to 3.3 V * LQFP48 package. APPLICATIONS * GSM 900 MHz hand-held transceiver * GSM/DCS dual-band solution with the UAA2077CM (down to 3.2 V) or UAA2077TS/D (down to 2.7 V). GENERAL DESCRIPTION The UAA3522HL integrates the receiver and most of the transmitter section of a GSM hand-held transceiver. It also integrates the receiver IF and the transmitter section of a DCS transceiver. The receiver comprises an RF and an IF section. The RF (GSM) front-end amplifies the aerial signal, converts the chosen channel frequency to an IF of 200 MHz, and also provides more than 30 dB of image suppression. Some selectivity is provided at this stage by an off-chip bandpass pre-filter. The IF section further amplifies the chosen channel, maintains the gain at the required level, demodulates the signal into I and Q components, and provides channel selectivity at a baseband stage using a high performance integrated low-pass filter. The IF gain can be varied over a range of more than 60 dB. The offset at the I and Q outputs can be cancelled out by software using the 3-wire serial programming bus.
UAA3522HL
The input Low Noise Amplifier (LNA) can be switched off via the bus to allow accurate calibration in the offset cancellation mode. The transmitter comprises a high precision I/Q modulator and modulation loop architecture. The I/Q modulator converts the baseband modulation frequency to the transmit IF. The modulation loop architecture, which includes an on-chip offset mixer and phase detector, controls an external transmit RF VCO which converts the transmit modulated IF signal to RF. A receive RF VCO provides the Local Oscillator (LO) signal to the image rejection mixers in the RF receiver. An IF VCO provides the LO signal to the I/Q demodulator and I/Q modulator in the receiver and transmitter sections respectively. The frequencies of the RF VCO and the IF VCO are set by internal PLL circuits, which are programmable via the 3-wire serial bus. The RF and IF PLL comparison frequencies are 200 kHz and 1 MHz respectively, derived from a 13 MHz reference signal which has to be supplied externally. The quadrature RF LO signals required by the image rejection mixers are obtained using on-chip Resistor Capacitor (RC) networks. The quadrature IF LO signals required by the I/Q modulator and I/Q demodulator are obtained by dividing the frequency of the IF VCO signal. The IC can be powered on in either receiver (RX), transmitter (TX) or synthesizer (SYN) operating mode depending on the logic level at pins RXON, TXON and SYNON, respectively. Alternatively, an operating mode can be selected by software using the 3-wire serial programming bus. In RX or TX mode, only those sections of the IC which are required are switched on. The GSM or DCS band is selected by the 3-wire serial programming bus. When activating RX mode for DCS applications, the receiver RF section can be disabled by software so that only the receiver IF section is powered-on. The SYN mode is used to power-on the synthesizer prior to activating the RX or TX mode. In SYN mode, some internal LO buffers are also powered-on to minimize the `pulling' effect of the VCO when either the receiver or the transmitter are switched on.
2000 Feb 18
2
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
QUICK REFERENCE DATA
SYMBOL PARAMETER MIN.
UAA3522HL
TYP.
MAX.
UNIT
fi(RF)(RX) fo(RF)(TX)(GSM) fo(RF)(TX)(DCS) fIF
GSM band RF input frequency in RX mode GSM band RF output frequency in TX mode DCS band RF output frequency in TX mode IF frequency in all modes
925 880 1710 -
- - - 200
960 915 1785 -
MHz MHz MHz MHz
ORDERING INFORMATION TYPE NUMBER UAA3522HL PACKAGE NAME LQFP48 DESCRIPTION plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm VERSION SOT313-2
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3
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handbook, full pagewidth
2000 Feb 18
1805 to1880 MHz BALUN 0 925 to 960 MHz BALUN 41, 42
BLOCK DIAGRAM
Philips Semiconductors
Low power dual-band GSM transceiver with an image rejecting front-end
x
90 PHASE SHIFTER
PHASE 90 SHIFTER
+
ADDER
x
SAW
UAA2077XM
x
90 PHASE SHIFTER 0
46, 47 PHASE 90 SHIFTER
8, 9
x
0 ADDER
4, 5
I
+
x
90
IF VCO 400 MHz
2, 3 Q
x
/2
DIVIDER & PHASE SHIFTER
13, 14 IF VCO XTAL
B A S E B A N D & A U D I O I N T E R F A C E
4
UAA3522HL
30, 31 DCS RF RX VCO 1510 to 1680 MHz GSM RF RX VCO 1080 to 1160 MHz 26 RX/TX SWITCH 880 to 915 MHz GSM BAND CHARGE PUMP PROGRAMMABLE DIVIDER PROGRAMMABLE DIVIDER IF PHASE/ FREQUENCY DETECTOR CHARGE 16 PUMP RF PHASE/ FREQUENCY DETECTOR DIVIDER
/5
DIVIDER
/13
23 REF OSC. 13 MHz
38, 39
x
ADDER PHASE DETECTOR
GSM TX RF VCO 880 to 915 MHz 35 1710 to 1785 MHz POWER DCS BAND AMPLIFIER CHARGE PUMP
+
44, 45
x x
90
0
4, 5 I
2, 3 Q
Objective specification
UAA3522HL
DCS TX RF VCO 1710 to 1785 MHz
FCA004
Fig.1 Block diagram.
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
PINNING SYMBOL VCCIF1 QA QB IA IB REFAGC GNDIF2 RXIIFA RXIIFB VCCIF2 TXON VCCIFLO IFLOC IFLOE GNDIFLO CPOIF GNDCPIF VCCCPIF EN DATA CLK GNDSYN REFIN VCCSYN PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION IF section of RF receiver supply voltage 1 Q path A baseband input/output Q path B baseband input/output I path A baseband input/output I path B baseband input/output AGC reference resistor I/Q modulator and I/Q demodulator ground 2 RX IF input A to AGC amplifier RX IF input B to AGC amplifier I/Q modulator and I/Q demodulator supply voltage 2 TX mode control pin IF LO supply voltage IF LO signal input from IF VCO resonator IF LO signal input from IF VCO resonator IF LO ground IF charge pump output IF charge pump and phase detector ground IF charge pump and phase detector supply voltage serial programming bus enable control pin serial programming bus data input serial programming bus clock input synthesizer ground 13 MHz reference input synthesizer supply voltage RXIRFA RXIRFB GNDRF TXIFA TXIFB RXOIFA RXOIFB GNDIF1 41 42 43 44 45 46 47 48 RESEXT TXIRFA TXIRFB VCCRF 37 38 39 40 PHDOUT VCCPHD 35 36 SYMBOL VCCCPRF CPORF GNDCP SYNON VCCRFLO RFLOC RFLOE GNDRFLO RXON GNDPHD PIN 25 26 27 28 29 30 31 32 33 34
UAA3522HL
DESCRIPTION RF charge pump and phase detector supply voltage RF charge pump output RF charge pump ground SYN mode control pin RF LO section supply voltage LO signal input from RF VCO LO signal input from RF VCO RF LO section ground RX mode control pin transmit modulation loop charge pump ground charge pump output transmit modulation loop charge pump supply voltage reference resistor for transmit modulation loop TX RF VCO signal input TX RF VCO signal input RF receiver and transmit modulation loop supply voltage RF receiver input A RF receiver input B RF receiver and transmit modulation loop ground transmit IF external filter A transmit IF external filter B receiver IF output A receiver IF output B IF section of RF receiver ground 1
2000 Feb 18
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Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
UAA3522HL
47 RXOIFB
46 RXOIFA
48 GNDIF1
42 RXIRFB
41 RXIRFA
39 TXIRFB
VCCIF1 QA QB IA IB REFAGC GNDIF2 RXIIFA RXIIFB
38 TXIRFA
43 GNDRF
40 VCCRF
handbook, full pagewidth
37 RESEXT
45 TXIFB
44 TXIFA
1 2 3 4 5 6
36 VCCPHD 35 PHDOUT 34 GNDPHD 33 RXON 32 GNDRFLO 31 RFLOE
UAA3522HL
7 8 9 30 RFLOC 29 VCCRFLO 28 SYNON 27 GNDCP 26 CPORF 25 VCCPRF
VCCIF2 10 TXON 11 VCCIFLO 12
IFLOC 13
IFLOE 14
GNDIFLO 15
CPOIF 16
GNDCPIF 17
VCCCPIF 18
EN 19
DATA 20
CLK 21
GNDSYN 22
REFIN 23
VCCSYN 24
FCA043
Fig.2 Pin configuration.
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6
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
FUNCTIONAL DESCRIPTION RF receiver The receiver front-end converts the aerial RF signal, in the GSM band (925 to 960 MHz), to an IF signal of approximately 200 MHz. The first stage of the receiver is a symmetrical LNA that is matched to 50 by an external balun. The LNA is followed by an image rejection mixer which suppresses the image by more than 30 dB. It comprises two mixers in parallel driven by 0 and 90 quadrature LO signals respectively. The IF signal from one mixer is shifted by 90 with respect to the IF signal from the other mixer, then both signals are added together to cancel out the image signal. The resultant IF signal is fed to the output via a high output impedance open-collector stage which drives an external Surface Acoustical Wave (SAW) filter which selects the required channel. I/Q demodulator The signal from the SAW filter enters the I/Q demodulator section. In addition to I/Q demodulation, this section performs Automatic Gain Control (AGC) over a range of 60 dB to maintain a constant output level irrespective of the antenna input level, and also applies additional channel selectivity at the baseband stage using an integrated high-order low-pass filter. The AGC amplifier output can be adjusted for a static offset of less than 50 mV. Its design prevents the offset from varying by more than 5 mV. To allow a more accurate offset calibration, the RF LNA can be switched off to ensure that no IF signal is present at the AGC amplifier input during the offset measurement. I/Q modulator Baseband I and Q signals are applied to the I/Q modulator which shifts the modulation spectrum up to the transmit IF. The I/Q modulator is designed for low harmonic distortion, low carrier leakage and high image rejection to keep the phase error as small as possible. Its IF output is loaded by an integrated low-pass filter and by an external LC tuned-circuit to prevent unwanted spurii from entering the phase detector in the transmit modulation loop. Transmit modulation loop The analog transmit modulation loop comprises an on-chip offset mixer and simple phase detector in switching mode (triangular transfer function) forming an analog PLL with an off-chip loop filter and transmit RF VCO.
UAA3522HL
The phase detector output transfers the modulation of the I/Q IF signal to the off-chip transmit RF VCO making the analog PLL act as a tracking filter. A PLL of at least third-order is needed to meet noise requirements at 20 MHz offset from the carrier. RF and IF LO sections The active components required for the design of a low noise IF VCO are provided on-chip. Pins IFLOC and IFLOE connect the on-chip IF VCO components to an external resonator and feedback circuit. A divider and phase shifter divides the frequency of the IF VCO signal by 2 and splits it into two signals having phases of respectively 0 and 90 which are both fed to the I/Q modulator and to the I/Q demodulator. The IF VCO frequency is twice the IF to suppress the effects of self-mixing and parasitic VCO modulation. Pins TXIRFA and TXIRFAB connect an external receive RF VCO module to the on-chip RF LO section. This section includes a RC phase shifter which splits the RF VCO signal into two signals having phases of respectively 0 and 90 which are both fed to the RX image rejection mixer. Dual PLL An on-chip high performance dual PLL synthesizes the frequencies of the receive RF VCO and IF VCO signals. Very low close-in phase noise is achieved which provides a wide PLL bandwidth with a short settling time. A dual programmable divider chain reduces the frequency of the receive RF and IF LO signals to 200 kHz and 1 MHz respectively. A digital phase/frequency detector compares their phases to a reference signal derived from an external 13 MHz clock signal. Phase error information is fed back to both VCOs via the dual charge pump circuit which adjusts the phase of each VCO signal by either `sinking' current into, or `sourcing' current from, its loop filter capacitor, phase locking both RF and IF loops. The very low leakage current of the dual charge pump circuit ensures that any spurii are negligible. Operating modes BASIC OPERATING MODES The circuit can be powered on in one of four operating modes in which different parts of the device are enabled or disabled. The four operating modes are called Idle, RX, TX and SYN, and are selected by the hardware control voltage level applied to pins RXON, TXON and SYNON.
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7
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
The synthesizer, receiver and transmitter cannot all be on at the same time. Table 1 shows which parts of the device are enabled (on) or disabled (off) in each mode. Table 1 MODE SYNTHESIZER RECEIVER TRANSMITTER Idle SYN RX TX off on on on off off on off off off off on 1 0 The synthesizer includes the oscillators and LO buffers common to the receive and transmit sections. The receiver includes the RF section and the I/Q demodulator. When the receiver is on, the LNA can be switched off to allow DC offset compensation to be performed. The RF section can also be switched off for DCS applications. See Section "Receiver power status control". RECEIVER POWER STATUS CONTROL * DC offset compensation: This feature allows the DC offset of the receiver output to be set accurately. When the receiver is on, the LNA can be switched off to isolate the antenna input from the I/Q demodulator input. The offset at the I and Q outputs can be independently reduced to less than 50 mV by adequately programming two 5-bit data registers, see Table 4 "Register bit allocation". The LNA is switched on or off by the status of bit LNA (see Table 2). * Disabling RF section: For DCS applications, the RF section can be disabled in RX mode. The same IF circuits are used for both GSM and DCS applications to avoid duplication. For DCS applications using the UAA2077XM, for example, the RF section of the UAA3522HL does not have to be powered on. The RF section is enabled or disabled by the status of bit RF when the RX mode is activated (see Table 3). Programming SERIAL PROGRAMMING BUS BIT RF STATUS Table 3 Bit RF status Operating modes POWER STATUS Table 2 Bit LNA status
UAA3522HL
BIT LNA STATUS 0 1
POWER STATUS OF BIT LNA off on
POWER STATUS OF RECEIVER RF SECTION IN RX MODE on (GSM) off (DCS)
A simple 3-wire unidirectional serial bus is used for programming the IC. The lines are called DATA, CLK and EN (enable). Programming data is sent to the IC in bursts which are separated from each other by EN. Programming clock edges are ignored until EN goes active LOW. The data is loaded into the addressed register when EN returns inactive HIGH, and when the CLK is in either state, without affecting the data in the register. The register only holds the last 18 bits that are serially clocked into the IC. Additional leading bits are ignored, and no check is made on the number of clock pulses received. The fully static CMOS design uses virtually no current when the bus is inactive. It can always accept new programming data even when both synthesizers are powered-off. DATA FORMAT Data is loaded into the register with the most significant bit (MSB) first. The first 14 bits are data, while the last 4 bits are the register address. The address bits are decoded on the rising edge of EN. This internally generates a load pulse to store the data in the addressed register. To ensure that data loads correctly after the device has powered-up, EN should be held LOW and only taken HIGH after the appropriate register has been loaded. The EN pulse is inhibited during the period when data is read by the frequency dividers to prevent divider ratio data from being read incorrectly. This state is guaranteed by always allowing for a minimum EN pulse width after data transfer.
2000 Feb 18
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(4)
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Philips Semiconductors
Low power dual-band GSM transceiver with an image rejecting front-end
ADDRESS BITS LAST BIT
6
5
4
3
2
1
0 LSB LSB LSB I sign(2) TX ON
3 0 0 0 0 0 0
2 1 1 0 0 0 0
1 1 0 1 1 0 0
0 0 0 1 0 1 0
IF LO frequency divider ratio X Q sign
(2)
RF LO frequency divider ratio MSB MSB 0 AGC amplifier gain (RX mode) see Table 5 I output offset adjust RF(5) X SYN ON LSB RX ON
Q output offset adjust X X IF RD
(3)
0
For test purposes only(6) Notes 1. Bit LNA: 1 = LNA ON in RX mode; 0 = LNA OFF in RX mode.
2. Bits Q sign and I sign = polarity of offset at Q/I channel outputs: 0 = negative offset step (output A with respect to output B); 1 = positive offset step (output A with respect to output B). 3. Bit IF RD: 0 = frequency dividers programmed for GSM applications; 1 = frequency dividers programmed for DCS applications. 4. Bit IF VCO: 0 = IF LO buffer ON (external IF LO source connected); 1 = IF VCO ON (external IF LO source not connected). 5. Bit RF: 1 = RF section ON when RX mode is activated; 0 = RF section OFF when RX mode is activated. 6. This address must not be used. Data bits to be defined.
Objective specification
UAA3522HL
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
Table 5 AGC amplifier gain register look-up table All codes not included in the table are forbidden. BIT 5 (MSB) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Note BIT 4 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 BIT 3 0 0 0 0 0 1 1 1 1 1 1 0 0 1 1 1 1 0 1 1 1 1 0 0 0 0 1 1 1 1 1 1 BIT 2 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 BIT 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 BIT 0 (LSB) 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
UAA3522HL
AGC AMPLIFIER GAIN (dB)(1) -1 +1 +3 +5 +7 +9 +11 +13 +15 +17 +19 +21 +23 +25 +27 +29 +31 +33 +35 +37 +39 +41 +43 +45 +47 +49 +51 +53 +55 +57 +59 +61
1. Voltage gain is defined as the differential baseband output voltage (either at pins IA/IB or pins QA/QB) divided by the differential input voltage at pins RXIIFA and RXIIFB.
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Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCCn Ptot Tstg Tamb HANDLING supply voltage total power dissipation storage temperature ambient temperature PARAMETER MIN. -0.3 - -40 -30
UAA3522HL
TYP. - - - -
MAX. +6 1 +150 +70
UNIT V W C C
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see "Handling MOS devices"). THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 65 UNIT K/W
DC CHARACTERISTICS All parameters are guaranteed at VCC = 2.8 V; Tamb = 25 C. SYMBOL PARAMETER CONDITIONS MIN. TYP. - - MAX. UNIT
Supply pins VCCIF1, VCCIF2, VCCIFLO, VCCRFLO, VCCSYN, and VCCRF VCC supply voltage note 1 2.7 3.3 V
Supply pins VCCCPIF and VCCCPRF VCCCPIF; VCCCPRF supply voltage note 1 2.7 4 V
Supply pin VCCPHD VCCPHD supply voltage for charge pump of phase detector in transmit modulation loop note 1 2.7 - 5.5 V
Supply pins VCCIF1, VCCIF2, VCCIFLO, VCCRFLO, VCCSYN, VCCCPIF, VCCCPRF, VCCPHD and VCCRF ICC(pd)(tot) total power-down supply current pins TXON, RXON, SYNON = LOW-level; pins EN, DATA, CLK = HIGH-l evel; note 2 - 40 100 A
RF receiver IF section (pins VCCIF1, RXOIFA and RXOIFB) ICC(RFIF)(RX) RF receiver and IF section total supply current RX mode active - 16.9 21.9 mA
IF section supply (pin VCCIF2) ICCIF(RX) ICCIF(TX) I/Q demodulator supply current I/Q modulator supply current RX mode active TX mode active - - 10.1 7.4 14.1 9.6 mA mA
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Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. - -
UAA3522HL
TYP.
MAX.
UNIT
IF LO section supply (pin VCCIFLO) ICCIFLO(SYN) IF LO section supply current SYN mode active 5.5 6.6 mA
IF charge pump supply (pin VCCCPIF) ICCCPIF(SYN) IF LO charge pump supply current SYN mode active; phase locked 1.2 1.5 mA
Synthesizer supply (pin VCCSYN) ICCSYN(SYN) synthesizer supply current SYN mode active - - 5 6.7 mA
RF LO charge pump and phase detector supply (pin VCCCPRF) ICCCPRF(SYN) RF LO charge pump supply current RF LO supply (pin VCCRFLO) ICCRFLO(RX) ICCRFLO(TX) RF LO buffer receive section supply current SYN mode active; RX mode active - - 8.6 9.8 10.9 12.6 mA mA SYN mode active; phase locked 1.4 1.7 mA
RF LO buffer transmit section supply TX mode active current
Closed-loop charge pump supply (pin VCCPHD) ICCPHD(TX) closed-loop charge pump supply current TX mode active; phase locked - 5.6 7.5 mA
RF receiver and transmit modulation loop supply (pin VCCRF) ICCRF(RX)on supply current of RF receiver (receive IF section disconnected) with RX image rejection mixer and LNA ON supply current of RF receiver (receive IF section disconnected) with RX image rejection mixer and LNA OFF supply current of transmit modulation loop (charge pump disconnected) RX mode active; LNA ON - 17.9 23.6 mA
ICCRF(RX)off
RX mode active; LNA OFF
-
11.2
14.6
mA
ICCRF(TX)
TX mode active
-
6.1
7.6
mA
Pins VCCIF1, VCCIF2, VCCIFLO, VCCCPIF, VCCSYN, VCCCPRF, VCCPHD, VCCRF and RXOIFA, RXOIFB ICC(RX) ICC(TX) ICC(SYN) VO(IQ) VI(IQ) VIH VIL supply current in RX mode supply current in TX mode supply current in SYN mode RX mode active; note 3 TX mode active; note 3 SYN mode active; note 3 - - - 1.125 1.175 44.9 20.3 21.7 59.6 26.4 27.4 mA mA mA
Pins IA IB, QA and QB DC voltage at I/Q baseband outputs DC voltage at I/Q baseband inputs TX mode active RX mode active 1.25 1.25 - - 1.325 1.35 - 0.7 V V
Logic levels (pins EN, DATA, CLK, TXON, RXON and SYNON) HIGH-level input voltage LOW-level input voltage 1.9 - V V
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Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
Notes:
UAA3522HL
1. VCCCPRF, VCCCPIF and VCCPHD must be equal to, or greater than, the other supply voltages. The other supply voltages must be equal. 2. `HIGH-level' means the control pin voltage must be equal to the supply voltage VCC. `LOW-level' means the control pin voltage must be equal to the supply ground. 3. ICC(RX) = ICC(RFIF)(RX) + ICCIF(RX) + ICCRF(RX); ICC(TX) = ICCIF(TX) + [ICCRFLO(TX) - ICCRFLO(RX)] + ICCPHD(TX) + ICCRF(TX); ICC(SYN) = ICCIFLO(SYN) + ICCCPIF(SYN) + ICCPLL(SYN) + ICCCPRF(SYN) + ICCRFLO(SYN). AC CHARACTERISTICS All parameters are guaranteed at VCC = 2.8 V; Tamb = 25 C; unless specified otherwise. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
RF receiver section; measured in a 50 impedance system, including external input/output baluns and matching networks to 50 (see Fig.3) RF RECEIVER INPUTS (PINS RXIRFA AND RXIRFB) fi(RF)(GSM) Ri(dif) Ci(dif) S11 Pi(spur) GSM band RF input frequency differential input resistance differential input capacitance input power matching level of spurious input power due to LO leakage note 1 925 - - - - - 146 0.85 -15 -50 960 - - -10 -40 MHz pF dB dBm
RECEIVER IF OUTPUT (PINS RXOIFA AND RXOIFB) fo(IF) RL(m) Gconv(p) Gripple G/T F CP1 IF output frequency matched load resistance power conversion gain gain ripple gain variation with temperature noise figure -1 dB input compression point referenced to input third-order intercept point referenced to input 3 dB desensitization point referenced to input for Ri(dif); notes 1, 3 and 4 note 1 at Tamb = 25 C over temperature range note 1 -23.5 - -24.2 - -18 - - - - dBm dBm dBm LO > RF differential; note 2 into specified matched load resistance; note 1 over specified frequency range; note 3 note 6 -60 - -30 3.45 - 3.85 dBm/K dB - - 23 -0.5 200 1 24.5 - - - 27 +0.5 MHz k dB dB
IP3
DES3dB
fi(RF) = 3 MHz RF input power = -101 dBm; note 1
-25
-
-
dBm
2000 Feb 18
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Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SYMBOL IR Goff PARAMETER image rejection output isolation in off-state CONDITIONS fo(IF) = 200 MHz; note 1 bit LNA = 0; notes 1 and 5 MIN. 30 60 TYP. 35 70 - -
UAA3522HL
MAX.
UNIT dB dB
Receiver IF section (AGC and baseband filter); the impedance of the source, input balun, matching network and specified input is 50 IF INPUT TO AGC AMPLIFIER (PINS RXIIFA AND RXIIFB) fi(IF) Ri(dif) Pi(m) Gconv(dif)(min) IF input frequency differential input resistance input power matching note 1 - - - -2.5 200 1 -15 -0.5 - - -10 +1.5 MHz k dB
BASEBAND INPUT/OUTPUT; RX MODE (PINS IA, IB, QA AND QB) differential voltage conversion gain per channel; gain set to minimum differential voltage conversion gain per channel; gain set to maximum voltage conversion step note 1 gain gain difference between I and Q paths quadrature-phase error between I and Q paths gain control linearity note 1 notes 1 and 11 within any 20 dB gain range F IP3 noise figure third-order intercept point referenced to input -1 dB compression point referenced to input -1 dB compression point for adjacent channels referenced to input -1 dB baseband filter bandwidth group delay variation Gconv(dif)(max); notes 1 and 9 Gconv(dif)(min); notes 1 and 9 Gconv(dif)(max) = 61 dB; note 8 note 1 notes 1 and 7 dB
Gconv(dif)(max)
59.5
61.5
63.5
dB
Gconv(step) GI-Q GL
- - -5 -2 -3 -1 - - -42
2 - - - - - - - -38
- 0.8 +5 +2 +3 +1 9 61 -
dB dB deg dB dB dB dB dB dBm
CP1
Gconv(dif)(min); note 8
-4
0
-
dBm
CP1adjacent
Gconv = 49 dB; notes 7 and 6 fmod = n x 200 kHz; n = 1, 2, 3 -45 -40 - 1.5 - - - dBm
Bbf(-1dB) td(g)
note 10 DC < fmod < 67.7 kHz
67.7 -
kHz S
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Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SYMBOL bf5 PARAMETER CONDITIONS MIN. 8 19 36 44 0.75 TYP. 11 25 55 - - - - - - -
UAA3522HL
MAX.
UNIT dB dB dB dB V
baseband filter note 10; attenuation fmod = 140 kHz (fifth-order Butterworth) fmod = 200 kHz fmod = 400 kHz fmod = 600 kHz
Vo(pin)(peak)(max) maximum peak output voltage per pin giving a total harmonic distortion of less than 3% at Gconv >7 VOO LSBoffset Voffset output offset voltage adjustment LSB offset adjustment offset variation
differential resistance between QA/QB or IA/IB > = 180 k; note 1
Gconv = 31 dB
-60 -
- 50 -
+60 100 +10
mV mV mV
gain from Gconv(dif)(min) to Gconv(dif)(max)
-10
Transmit IF section; general conditions: Vmod(peak) = 0.25 V; VI(IQ) = VO(IQ) = 1.25 V; fmod = 67.7 kHz BASEBAND INPUT/OUT; TX MODE (PINS IA, IB, QA AND QB) fmod Vmod(peak) DRi modulation frequency modulation level (peak value) dynamic input resistance gain = -3 dB gain single-ended single-ended per pin 0 - 2 0.275 - MHz V k 0.225 0.25 - 12.5
TRANSMITTER IF LC TUNED CIRCUIT (PINS TXIFA AND TXIFB) fo(IF) LOout Po IF output frequency local oscillator feedthrough level transmit power without LC tuned circuit level of second-order image products level of third-order image products image level phase noise output power density fo(IF) = 200 MHz fo(IF) = 200 MHz 67.7 kHz; measured through a balun; note 12 fo(IF) = 200 MHz 2 x 67.7 kHz; note 12 fo(IF) = 200 MHz 3 x 67.7 kHz; note 12 fo(IF) = 200 MHz - 67.7 kHz; note 12 foffset = 400 kHz foffset = 10 MHz - - - 200 -40 -16 - -30 - MHz dBc dBm
IM2o IM3o IMo N
- - - - -
-48 -55 -34 -
-45 -50 - -125
dBc dBc dBc dBc/Hz dBc/Hz
-140 -133
Transmit modulation loop section; General conditions: Vmod(peak) = 0.25 V; VI(IQ) = VO(IQ) = 1.25 V; fmod = 67.7 kHz OFFSET MIXER; GSM BAND (PINS TXIRFA AND TXIRFB) fi(RF)(TX) TX RF VCO input frequency 880 - 915 MHz
2000 Feb 18
15
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SYMBOL Ri(pin) Ci(pin) Pi S11 LOL PARAMETER input resistance per pin note 13 input capacitance per pin input power input power matching reverse isolation local oscillator leakage symmetrical single-ended note 1 CONDITIONS MIN. - - TYP. 100 1 - -
UAA3522HL
MAX.
UNIT pF dBm dBm dB dBm
-14.5 -10 -11.5 -7 - - -15 -
-5.5 -2.5 -10 -40
OFFSET MIXER; DCS BAND (PINS TXIRFA AND TXIRFB) fi(RF)(TX) Ri(pin) Ci(pin) Pi S11 LOL TX RF VCO input frequency input resistance per pin note 13 input capacitance per pin input power input power matching reverse isolation local oscillator leakage charge pump maximum R = 270 , 1%; VO = 12VCCPHD sink or source current phase detector gain phase detector gain variation output voltage output resistance output noise current density VCO sweeping source current output resistance to ground when powered down level of spurious signal at four times the wanted fmod signal level of spurious signal at eight times the wanted fmod signal local oscillator feedthrough level image level VO = 12VCCPHD 20 kHz < foffset < 20 MHz in lock; note 1 VO = 12VCCPHD TX mode disabled VO =
1 V 2 CCPHD;
1710 - - symmetrical single-ended note 1
- 100 1
1785 - - -5.5 -2.5 -10 -40
MHz pF dBm dBm dB dBm
-14.5 -10 -11.5 -7 - - -15 -
PHASE DETECTOR; DCS AND GSM BAND (PIN PHDOUT) Icp(max) GPHD GPHD VO Ro No Isweep Ro(off) 2.2 - note 11 -20 0.5 - - 0.4 - 2.4 2 - - 10 - 0.55 1 2.6 - +20 mA mA/rad %
VCCPHD - 0.5 V - 200 0.7 - k pA/Hz mA k
SPUR4fm
SPUR8fm
fmod = 67.7 kHz; - fo(RF)(GSM) = 880 MHz to 915 MHz; fo(RF)(DCS) = 1710 MHz to 1785 MHz -
-
-48
dBc
-
-55
dBc
LOout IMo
at fRF at fRF; note 1
- -
-40 -38
-32 -35
dBc dBc
2000 Feb 18
16
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SYMBOL PARAMETER CONDITIONS MIN. TYP.
UAA3522HL
MAX.
UNIT
RF LO buffer; measured and guaranteed on evaluation board RF LO SOURCE CONNECTED TO PIN RFLOE (see Fig.7) Ri Ci S11 Pi(LO) input resistance input capacitance input power matching input power acceptable from the RF LO source - - - -7 50 1 -15 -3 - - -10 2 pF dB dBm
IF LO; measured and guaranteed on evaluation board EXTERNAL RESONATOR CIRCUIT CONNECTED TO PINS IFLOC AND IFLOE fosc Vosc(peak) oscillation frequency peak voltage excursion limit at IFLOC (collector) phase noise note 1 VCCIFLO = 2.8 V; see Fig.5 - 1 400 - - 1.5 MHz V
N fTROFF
foffset = 400 kHz; fLO(IF) = 400 MHz
- -
- -
-125 1
dBc/Hz MHz/V
frequency variation with note 14 supply voltage (pushing) frequency variation between RX on and RX off (pulling)
fTRON
-
-
10
kHz
IF LO buffer; measured and guaranteed on evaluation board IF SOURCE CONNECTED TO PIN IFLOE Ri Ci Pi(m) PIF input resistance input capacitance input power matching power available from the IF source see Fig.5 - - - -8 50 1 -15 -5 - - -10 -2 pF dB dBm
RF and IF synthesizer VCOs REFERENCE FREQUENCY INPUT (PIN REFIN) fref Vi(fref)(rms) Ri Ci fLO(RF) fph(comp) N(GSM) reference frequency input voltage level (RMS value) input resistance input capacitance fref = 13 MHz - 80 - - 1040 - within the closed-loop bandwidth Pxtal = 0 dBm; fLO(RF) = 1.1 GHz - 13 - 10 1 - 200 -82 - 250 - - 1720 - -75 MHz mV k pF
RF SYNTHESIZER; GSM AND DCS MODES (PINS RXIRFA, RXIRFB AND CPORF) RF LO frequency phase comparator frequency GSM close-in phase noise MHz kHz dBc/Hz
2000 Feb 18
17
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SYMBOL N(DCS) Vfph(comp)(spur) PARAMETER DCS close-in phase noise phase comparator frequency spurii breakthrough level charge pump output current charge pump leakage current in off-state charge pump output voltage Io(cp) within specified values CONDITIONS within the closed-loop bandwidth Pxtal = 0 dBm; fLO(RF) = 1.6 GHz foffset = 200 kHz; second-order loop filter closed-loop bandwidth = 11 kHz sink or source current; at Vo(cp) MIN. - - TYP. -79 -75
UAA3522HL
MAX. -74 -60
UNIT dBc/Hz dBc
Io(cp) IL(cp)(off) Vo(cp)
1.8 -5 0.4
2.2 - -
2.6 +5 VCC - 0.4
mA nA V
IF SYNTHESIZER (PINS IFLOC, IFLOE AND CPOIF) fLO(IF) fph(comp) N Vfph(comp)(spur) IF LO frequency phase comparator frequency close-in phase noise phase comparator frequency spurii breakthrough level charge pump output current charge pump leakage current in off-state charge pump output voltage within the closed-loop bandwidth Pxtal = 0 dBm; fLO(IF) = 400 MHz foffset = 1 MHz; second order loop filter closed-loop bandwidth = 25 kHz sink or source current; at Vo(cp) 380 - - - 400 1 -95 -75 440 - -85 -60 MHz MHz dBc/Hz dBc
Io(cp) IL(cp)(off) Vo(cp)
0.75 -5 0.4
1.1 - -
1.35 +5 VCC - 0.4
mA nA V
Frequency dividers D/DfLO(RF) RF frequency programmable divider ratio IF frequency programmable divider ratio RF reference frequency fixed ratio divider ratio IF reference frequency divider ratio 5200 - 8600
D/DfLO(IF)
-
200
-
D/Dfref(RF) D/Dfref(IF)
- -
65 13
- -
General IC specification tON switch-on time 90% of the final current - - 10 s
2000 Feb 18
18
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
Notes 1. Measured and guaranteed only on UAA3522 evaluation board.
UAA3522HL
2. The IF output has open collectors which are supplied via external inductors. External resistors are also needed to set the output impedance and to match the IF output to the specified load resistance RL (see Fig.3). 3. Value includes losses due to the printed circuit board and balun. 4. Value is guaranteed only for the Pi(LO) typ. 5. For a given RF input power, the value is the difference in the power measured at the IF output when the LNA is switched on and when it is switched off. 6. This value is guaranteed within the temperature range -10 to +70 C. 7. Voltage gain is defined as the differential baseband output voltage (either at pins IA/IB or pins QA/QB) divided by the differential input voltage at pins RXIIFA and RXIIFB. 8. Value refers to differential voltage at pins RXIIFA and RXIIFB (1 k input impedance). 9. Value includes printed circuit board and balun losses. 10. RREFAGC = 18 k, 1%. 11. Guaranteed at Tamb = -30 to +70 C. 12. With specified LC tuned circuit (33 nH, 15 pF) connected as shown in Fig.4. 13. Defined for the typical input power. 14. Oscillator configured as shown in the evaluation board diagram Fig.7.
handbook, full pagewidth
VCC
50 LOW LOSS BALUN
RXIRFA RF RECEIVER RXIRFB RXOIFA Z = 1 k RXOIFB output port
FCA047
BALUN 1 k/50
RL 50
input port
Fig.3 RF receiver test principle.
2000 Feb 18
19
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
UAA3522HL
handbook, full pagewidth
VCC
15 pF 33 nH
EXTERNAL IF FILTER
330
330 TXIFA TXIFB
2 k
FCA045
Fig.4 I/Q modulator output.
handbook, full pagewidth
VCCIFLO
VCC 1 k
UAA3522HL
IFLOC
IF VCO XTAL
IFLOE IF SOURCE
GNDIFLO
FCA048
Fig.5 Evaluating IF LO buffer.
2000 Feb 18
20
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SERIAL TIMING CHARACTERISTICS General conditions: VCC = 2.8 V; Tamb = 25 C; see Fig.6; unless otherwise specified. SYMBOL Serial programming clock (pin CLK) tr tf Tcy(clk) td(ENL-CLKH) td(CLKL-ENH) tW(reg)(min) tW(IFLO)(min) tW(RFLO)(min) tsu(ENH-CLKH) tsu(DATA-CLK) th(DATA-CLK) rise time fall time clock cycle time - - 100 10 10 - - - - - - - - - PARAMETER MIN.
UAA3522HL
TYP.
MAX.
UNIT
40 40 - - - - - - - - -
ns ns ns
Enable programming (pin EN) delay from enable active to rising clock edge delay from enable inactive to last falling clock edge minimum inactive pulse width when consecutively programming two different registers minimum inactive pulse width when consecutively programming two IF divider ratios minimum inactive pulse width when consecutively programming two RF divider ratios enable set-up time to next rising clock edge 40 20 150 150 500 20 ns ns ns ns ns ns
Register serial input data (pin DATA) set-up time DATA to CLK hold time DATA to CLK 20 20 ns ns
handbook, full pagewidth
t d(CLKL-ENH) t h(DATA-CLK) Tcy(CLK) tf tr tsu(ENH-CLKH)
t su(DATA-CLK)
CLK
DATA
MSB
LSB
ADDRESS
INACTIVE EN ACTIVE
FCA042
t d(ENL-CLKH)
tW
Fig.6 Serial bus timing diagram.
2000 Feb 18
21
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andbook, full pagewidth
DATA
EN
330 BB149 100 pF 100 pF
10 k 470 pF
CLK
2000 Feb 18
VCC 100 nH QA QB IA IB
APPLICATION INFORMATION
Philips Semiconductors
Low power dual-band GSM transceiver with an image rejecting front-end
RX RF VCC RX IF 100 nH 150 nH 10 pF 3.9 pF 3.9 pF 2.2 pF 150 nH
12 nH 27 pF 27 pF 18 pF 12 nH VCC 270 39 38 37 36 35 34 33 32 22 pF 31 RXON 18 27 nF VCC 220 1.8 nF 100 pF 27 pF TX RF VCO 18 pF 22 nH ATTENUATOR
10 pF 47 nH 1.5 k 12 pF
48 VCC 1 2 3 4 5 18 k 6
47
46
45
44
43
42
41
40
3.9 pF 120 pF 150 nH RX IF 3.9 pF 120 pF 150 nH VCC 470 nH RXIIFA RXIIFB VCC TXON
UAA3522HL
7 8 9 10 11 12 13 14 15 16 17 18 VCC 33 pF 3.3 k 6.8 nF 19 20 21 22 23 30 29 22 pF VCC
22
28 SYNON 27 26 25 24 VCC 13 MHz 10 k SERIAL PROGRAMMING BUS LINES (chip) 39 pF VCC 3.3 k 1 nF
RX RF VCO
12 nF
VCC(chip) 27 pF 100 pF 1 nF
VCC(board) 200 mV
8.2 pF 22 nH
1 nF
Objective specification
SERIAL PROGRAMMING BUS LINES
SERIAL PROGRAMMING BUS LINES (board)
UAA3522HL
FCA044
This schematic represents the UAA3522HL characterisation board for GSM application and does not guarantee full specification for any particular application.
Fig.7 Evaluation board.
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1805 to1880 MHz BALUN 0 925 to 960 MHz BALUN 41, 42
Typical application
Philips Semiconductors
handbook, full pagewidth
Low power dual-band GSM transceiver with an image rejecting front-end
x
90 PHASE SHIFTER
PHASE 90 SHIFTER
+
ADDER
x
SAW
UAA2077XM
x
90 PHASE SHIFTER 0
46, 47 PHASE 90 SHIFTER
8, 9
x
0 ADDER
4, 5
I
+
x
90
IF VCO 400 MHz
2, 3 Q
x
/2
DIVIDER & PHASE SHIFTER
13, 14 IF VCO XTAL
B A S E B A N D & A U D I O I N T E R F A C E
23
UAA3522HL
30, 31 DCS RF RX VCO 1510 to 1680 MHz GSM RF RX VCO 1080 to 1160 MHz 26 RX/TX SWITCH 880 to 915 MHz GSM BAND CHARGE PUMP PROGRAMMABLE DIVIDER RF PHASE/ FREQUENCY DETECTOR DIVIDER
PROGRAMMABLE DIVIDER
IF PHASE/ FREQUENCY DETECTOR
CHARGE 16 PUMP
/5
DIVIDER
/13
23 REF OSC. 13 MHz
38, 39
x
ADDER PHASE DETECTOR
GSM TX RF VCO 880 to 915 MHz 35 1710 to 1785 MHz POWER DCS BAND AMPLIFIER CHARGE PUMP
+
44, 45
x x
90
0
4, 5 I
2, 3 Q
Objective specification
UAA3522HL
DCS TX RF VCO 1710 to 1785 MHz
FCA004
Fig.8 Typical application block diagram of a GSM dual-band solution using the UAA2077XM DCS front-end and the UAA3522HL transceiver.
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
PACKAGE OUTLINE LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
UAA3522HL
SOT313-2
c
y X
36 37
25 24 ZE
A
e
E HE
A A2
A1
(A 3) Lp L detail X
wM pin 1 index 48 1 12 ZD bp D HD wM B vM B vM A 13 bp
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT313-2 REFERENCES IEC 136E05 JEDEC MS-026 EIAJ EUROPEAN PROJECTION A max. 1.60 A1 0.20 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 7.1 6.9 E (1) 7.1 6.9 e 0.5 HD 9.15 8.85 HE 9.15 8.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 0.95 0.55 0.95 0.55 7 0o
o
ISSUE DATE 99-12-27 00-01-19
2000 Feb 18
24
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board.
UAA3522HL
The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2000 Feb 18
25
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
Suitability of surface mount IC packages for wave and reflow soldering methods
UAA3522HL
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2000 Feb 18
26
Philips Semiconductors
Objective specification
Low power dual-band GSM transceiver with an image rejecting front-end
NOTES
UAA3522HL
2000 Feb 18
27
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
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Printed in The Netherlands
403506/01/pp28
Date of release: 2000
Feb 18
Document order number:
9397 750 06451

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